STATS ChipPAC
(SGX: S24)

STATS ChipPAC Pte. Ltd., formerly STATS ChipPAC Ltd., is a provider of semiconductor packaging and test services. The Company's solutions are used in applications, including communications, digital consumer and computing. Its technology portfolio includes leadframe and laminate packages, fan-out and fan-in wafer level technology (FIWLP), flip chip interconnect and system-in-package (SiP). The Company's manufacturing facilities are located in Singapore, South Korea and China. The Company markets its services through its direct sales force in the United States, South Korea, China, Singapore, Taiwan and Switzerland. The Company's services include post wafer fab process, and back-end assembly and test. The Company offers a platform of wafer level technologies for devices, which include FIWLP, including embedded Wafer Level Ball Grid Array, and Fan-out Wafer Level Packaging (FOWLP), including Wafer Level Chip Scale Packages and encapsulated Wafer Level Chip Scale Packages.

3.800 s

-0.120 (-3.06%)
Range 3.760 - 3.920   (4.26%)
Open 3.870
Previous Close 3.920
Bid Price 3.800
Bid Volume ('000) 47.1
Ask Price 3.810
Ask Volume ('000) 76.9
Volume ('000) 11,587.7
Value -
Remark s
Delayed prices. Updated at 03 Apr 2020 04:50.
Data powered by
View All Events

About STATS ChipPAC

STATS ChipPAC Pte. Ltd., formerly STATS ChipPAC Ltd., is a provider of semiconductor packaging and test services. The Company's solutions are used in applications, including communications, digital consumer and computing. Its technology portfolio includes leadframe and laminate packages, fan-out and fan-in wafer level technology (FIWLP), flip chip interconnect and system-in-package (SiP). The Company's manufacturing facilities are located in Singapore, South Korea and China. The Company markets its services through its direct sales force in the United States, South Korea, China, Singapore, Taiwan and Switzerland. The Company's services include post wafer fab process, and back-end assembly and test. The Company offers a platform of wafer level technologies for devices, which include FIWLP, including embedded Wafer Level Ball Grid Array, and Fan-out Wafer Level Packaging (FOWLP), including Wafer Level Chip Scale Packages and encapsulated Wafer Level Chip Scale Packages.

Please login to view stock data and analysis